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| USBIT1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator July 2006 USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator Features Complies with Universal Serial Bus Specification 2.0 Integrated 5V to 3.3V voltage regulator for powering Description This chip provides a USB Transceiver functionality with a voltage regulator that is compliant to USB Specification Rev 2.0. this integrated 5V to 3.3V regulator allows interfacing of USB Application specific devices with supply voltages ranging from 1.65V to 3.6V with the physical layer of Universal Serial Bus. It is capable of operating at 12Mbits/s (full speed) data rates and hence is fully compliant to USB Specification Rev 2.0. The Vbusmon terminal allows for monitoring the Vbus line. The USB1T1103 also provides exceptional ESD protection with 15kV contact HBM on D+,D- terminals VBus Utilizes digital inputs and outputs to transmit and receive USB cable data Supports full speed (12Mbits/s) data rates Ideal for portable electronic devices MLP technology package (16 terminal) with HBCC footprint 15kV contact HBM ESD protection on bus terminals Supports disable mode and is functionally equivalent to Philips ISP1102 Applications PDA PC Peripherals Cellular Phones MP3 Players Digital Still Camera Information Appliance Ordering Information Part Number USB1T1103MPX Package Number MLP14D Product code Pb-Free Top Mark $Y&Z&2&T USB1103 $Y&Z&2&T USB1103 Yes Package Description 14-Terminal Molded Leadless Package (MLP), 2.5mm Square 16-Terminal Molded Leadless Package (MHBCC), JEDEC MO-217,3mm Square Packing Method 3K Units on Tape and Reel 3K Units on Tape and Reel USB1T1103MHX MLP16HB Yes Pb-Free package per JEDEC J-STD-020B. (c) 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com USB1T1103 Rev. 1.0.2 USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator Typical Application Figure 1. Logic Diagram Connection Diagrams Figure 2. MLP16 GND Exposed Diepad (Bottom View) Figure 3. MLP14 GND Exposed Diepad (Bottom View) (c) 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com USB1T1103 Rev. 1.0.2 2 USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator Terminal Descriptions Terminal Terminal Number Name MLP14 MLP16 1 1 OE I/O I Terminal Description Output Enable: Active LOW enables the transceiver to transmit data on the bus. When not active the transceiver is in the receive mode (CMOS level is relative to VCCIO) Receive Data Output: Non-inverted CMOS level output for USB differential Input (CMOS output level is relative to VCCIO). Driven LOW when SUSPN is HIGH; RCV output is stable and preserved during SE0 condition. Single-ended D+ receiver output VP (CMOS level relative to VCCIO): Used for external detection of SE0, error conditions, speed of connected device; Terminal also acts as drive data input Vpo (see Table 1 and Table 2). Output drive is 4 mA buffer. Single-ended D- receiver output Vm (CMOS level relative to VCCIO): Used for external detection of SE0, error conditions, speed of connected device; Terminal also acts as drive data input Vmo (see Table 1 and Table 2). Output drive is 4 mA buffer. Suspend: Enables a low power state (CMOS level is relative to VCCIO). While the SUSPND terminal is active (HIGH) it will drive the RCV terminal to logic "0" state. No Connect Supply Voltage for digital I/O terminals (1.65V to 3.6V): When not connected the D+ and D- terminals are in 3-STATE. This supply bus is totally independent of VCC (5V) and VREG (3.3V), and must never exceed the VREG (3.3) voltage. For VCCIO disconnected the O+/O- terminals are HIGH Impedance and the VPU (3.3V) is turned off. 2 2 RCV O 3 3 Vp/Vpo I/O 4 4 Vm/Vmo I/O 5 5 SUSPND I -- 6 6 7 NC VCCIO 7 8 Vbusmon O Vbus monitor output (CMOS level relative to VCCIO): When Vbus > 4.1V then Vbusmon = HIGH and when Vbus < 3.6V then Vbusmon = LOW. If SUSPND = HIGH then Vbusmon is pulled HIGH. Data +, Data -: Differential data bus conforming to the USB standard. Terminals are HIGH Impedance for bus powered mode when Vbus < 3.6V. For ByPass Mode then HIGH Impedance when VREG/ Vbus < VREG minimum. No Connect No Connect Internal Regulator Option: Regulated supply output voltage (3.0V to 3.6V) during 5V operation; decoupling capacitor of at least 0.1 F is required. Regulator ByPass Option: Used as supply voltage input for 3.3V operation. Internal Regulator Option: Used as supply voltage input (4.0V to 5.5V); can be connected directly to USB line Vbus. Regulator ByPass Option: Connected to VREG (3.3V) Pull-up Supply Voltage (3.3V 10%): Connect an external 1.5k resistor on D+ (FS data rate); Terminal function is controlled by Config input terminal: Config = LOW - VPU (3.3V) is floating (HIGH Impedance) for zero pull-up current. Config = HIGH - VPU (3.3V) = 3.3V; internally connected to VREG (3.3V). VPU is OFF in disable mode. 9, 8 10, 9 D+, D- AI/O 10 -- 11 11 12 13 NC NC VREG (3.3V) 12 14 VCC (5.0V) 13 15 VPU (3.3V) 14 Exposed Diepad 16 Exposed Diepad Config GND I GND USB connect or disconnect software control input. Configures 3.3V to external 1.5k resistor on D+ when HIGH. GND supply down bonded to exposed diepad to be connected to the PCB GND. (c) 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com USB1T1103 Rev. 1.0.2 3 USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator Functional Description The USB1T1103 transceiver is designed to convert CMOS data into USB differential bus signal levels and to convert USB differential bus signal to CMOS data. To minimize EMI and noise the outputs are edge rate controlled with the rise and fall times controlled and defined for full speed data rates only (12Mbits/s). The rise, fall times are balanced between the differential terminals to minimize skew. The USB1T1103 differs from earlier USB Transceiver in that the Vp/Vm and Vpo/Vmo terminals are now I/O terminals rather than discrete input and output terminals. Table 1 describes the specific terminal functionality selection. Table 2 and Table 3 describe the specific Truth Tables for Driver and Receiver operating functions. The USB1T1103 also has the capability of various power supply configurations, including a disable mode for VCCIO disconnected, to support mixed voltage supply applications (see Table 4) and Section 2.1 for detailed descriptions. Functional Tables Table 1. Function Select SUSPND L L H H OE L H L H D+, DDriving & Receiving Receiving (1) Driving 3 STATE(1) RCV Active Active Inactive(2) Inactive(2) Vp/Vpo Vpo Input Vp Output Vpo Input Vp Output Vm/Vmo Vmo Input Vm Output Vmo Input Vm Output Function Normal Driving (Differential Receiver Active) Receiving Driving during Suspend (Differential Receiver Inactive) Low Power State Notes: 1. Signal levels is function of connection and/or pull-up/pull-down resistors. 2. For SUSPND = HIGH mode the differential receiver is inactive and the output RCV is forced LOW. The out-of-suspend signaling (K) is detected via the single-ended receivers of the Vp/Vpo and Vm/Vmo terminals. Table 2. Driver Function (OE = L) using Differential Input Interface Vm/Vmo L L H H Vp/Vpo L H L H Data (D+ / D-) SE0 (3) Differential Logic 1 Differential Logic 0 Illegal State Notes: 3. SE0 = Single Ended Zero Table 3. Receiver Function (OE = H) D+, DDifferential Logic 1 Differential Logic 0 SE0 RCV H L X Vp/Vpo H L L Vm/Vmo L H L Notes: 4. X = Don't Care 5. RCV(0) denotes the signal level on output RCV just prior to the SE0 or SE1 event. This level is stable during the SE0 or SE1 event period. (c) 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com USB1T1103 Rev. 1.0.2 4 USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator Power Supply Configurations and Options The three modes of power supply operation are: Normal Mode: Regulated Output and Regulator Bypass 1. Regulated Output: VCCIO is connected and VCC(5.0) is connected to 5V (4.0V to 5.5V) and the internal voltage regulator then produces 3.3V for the USB connections. Internal Regulator Bypass Mode: VCCIO is connected and both VCC(5.0) and VREG(3.3) are connected to a 3.3V source (3.0V to 3.6V). external signals up to 3.6V to share the D+ and D- bus lines. Internally the circuitry limits leakage from D+ and D- terminals (maximum 10A) and VCCIO such that device is in low power (suspended) state. Terminals Vbusmon and RCV are forced LOW as an indication of this mode with Vbusmon being ignored during this state. Disable Mode: VCCIO is not connected. VCC is connected, or VCC and VREG are connected. 0V to 3.3V in this mode D+ and D- are 3-STATE and VPU is HIGH Impedance (switch is turned off). The USB1T1103 allows external signals up to 3.6V to share the D+ and D- bus lines. Internally the circuitry limits leakage from D+ and D- pins (maximum 10 A). A summary of the Supply Configurations is described in Table 4. 2. In both cases, for normal mode, the VCCIO is an independent voltage source (1.65V to 3.6V) that is a function of the external circuit configuration. Sharing Mode: VCCIO is only supply connected. VCC and VREG are not connected. In this mode, the D+ and D- terminals are 3-STATE and the USB1T1103 allows Table 4. Power Supply Configuration Options Terminals VCC (5V) Disable Connected to 5V source Sharing Not Connected or <3.6V Normal (Regulated Output) Connected to 5V Source Normal (Regulator Bypass) Connected to VREG (3.3V) [Max Drop of 0.3V] (2.7V to 3.6V) Connected to 3.3V Source 1.65V to 3.6V Source 3.3V Available if Config = HIGH Function of Mode Set Up Function of Mode Set Up Function of Mode Set Up Function of Mode Set Up Function of Mode Set Up VREG (3.3V) VCCIO VPU (3.3V) D =, DVp/Vpo, Vm/Vmo RCV Vbusmon OE, SUSPND, Config 3.3V, 300A Regulated Output 0.5V 3-STATE (off) 3-STATE (off) Invalid [I] Invalid [I] Invalid [I] Hi-Z Not Connected 1.65V to 3.6V Source 3-STATE (off) 3-STATE L L L Hi-Z 3.3V, 300A Regulated Output 1.65V to 3.6V Source 3.3V Available if Config = HIGH Function of Mode Set Up Function of Mode Set Up Function of Mode Set Up Function of Mode Set Up Function of Mode Set Up Notes: 6. Invalid [I] I/O are to be 3-STATE, outputs to be LOW. (c) 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com USB1T1103 Rev. 1.0.2 5 USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator ESD Protection ESD Performance of the USB1T1103 HBM D+/D-: 15.0kV HBM, all other terminals (Mil-Std 883E): 6.5kV Human Body Model Figure 3 shows the schematic representation of the Human Body Model ESD event. Figure 4 is the ideal waveform representation of the Human Body Model. ESD Protection: D+/D- Terminals Since the differential terminals of a USB transceiver may be subjected to extreme ESD voltages, additional immunity has been included in the D+ and D- terminals without compromising performance. The USB1T1103 differential terminals have ESD protection to the following limits: 15kV using the contact Human Body Model 8kV using the Contact Discharge method as specified IEC 61000-4-2, IEC 60749-26 and IEC 60749-27 The IEC 61000-4-2 standard covers ESD testing and performance of finished equipment and evaluates the equipment in its entirety for ESD immunity. Fairchild Semiconductor has evaluated this device using the IEC 6100-4-2 representative system model depicted in Figure 5. Under the additional standards set forth by the IEC, this device is also compliant with IEC 60749-26 (HBM) and IEC 60749-27 (MM). Additional ESD Test Conditions For additional information regarding our product test methodologies and performance levels, please contact Fairchild Semiconductor. in IEC 61000-4-2 Figure 3. Human Body ESD Test Model Figure 4. HBM Current Waveform Figure 5. IEC 61000-4-2 ESD Test Model (c) 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com USB1T1103 Rev. 1.0.2 6 USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator Absolute Maximum Ratings The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table defines the conditions for actual device operation. Symbol VCC (5V) VCCIO ILU IIK VI IOK VO IO ICC,IGND Supply Voltage Parameter I/O Supply Voltage Latch-up Current, VI = -1.8V to +5.4V DC Input Current, VI<0 DC Input Voltage(4) DC Output Diode Current, VO >VCC or VO <0 DC Output Voltage (5) Min. -0.5 -0.5 Max. +6.0 +4.6 150 -18 Unit V V mA mA V mA V mA mA mA -0.5 -0.5 VCCIO +0.5 18 VCCIO+0.5 12 12 100 Output Source or Sink Current, VO + 0 to VCC Current for D+,D- Terminals Current for RCV, VM/VP DC VCC or GND Current ESD Immunity Voltage VESD Contact HBM Terminals D+,D-, ILI < 1A All other Terminals ILI < 1A TSTG PTOT Notes: 7. IO Absolute Maximumun Rating must be observed. 8. Per ESD Methodology described on page 6. 15 6.5 -40 +125 48 9 kV kV C mW mW Storage Temperature Power Dissipation ICC (5V) ICCIO Recommended Operation Conditions Symbol VCC VCC10 VI VAI/O TA Supply Voltage I/O DC Voltage DC Input Voltage Range DC Input Range for AI/O, Terminal D+ and DOperating Ambient Temperature Parameter Min. 4.0 1.65 0 0 -40 Max. 5.5 3.6 VCCIO +5.5 3.6 +85 Unit V V V V C (c) 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com USB1T1103 Rev. 1.0.2 7 USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator DC Electrical Characteristics Supply Terminals Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). VCC (5V) = 4.0V to 5.5V or VREG (3.3V) = 3.0V to 3.6V, VCCIO = 1.65V to 3.6V. Limits Symbol Parameter Conditions Internal Regulator Option; ILOAD 300 A Transmitting and Receiving at 12 Mbits/s; CLOAD = 50 pF (D+, D-) Transmitting and Receiving at 12 Mbits/s IDLE: VD + 2.7V, VD - 0.3V; SE0: VD + 0.3V, VD - 0.3V IDLE, SUSPND or SE0 VCCIO = 0V VCC Connected ICC(SUSPND) Suspend Supply Current USB1T1103 ICCIO(SHARING) ID+ (SHARING) -40C to +85C Min. Typ. 3.3 4.0(11) 1.0(11) Units V mA mA A A A Max. 3.6 8.0 2.0 300(12) 20.0 25.0 25.0(12) A VREG (3.3V) Regulated Supply Output ICC ICCIO ICC (IDLE) Operating Supply Current (VCC5.0) I/O Operating Supply Current Supply Current during FS IDLE and SE0 (VCC5.0) ICCIO (STATIC) I/O Static Supply Current ICC(DISABLE) Disable Supply Current 3.0(9)(10) SUSPND = HIGH OE = HIGH Vm = Vp = OPEN I/O Sharing Mode Supply Current VCC (5V) Not Connected Sharing Mode Load Current on D+/D- Terminals Disable Mode Load Current on D+/D- Terminals VCC (5V) Not Connected Config = LOW; VD = 3.6V VCCIO Not Connected or 0V Config = VD = 3.6V LOW or HIGH Supply Lost Supply Present 4.1 70.0 20.0 10.0 10.0 A A A ID +/ID+(DISABLE) ID+/VCCTH VCC Threshold Detection Voltage 1.65V VCCIO 3.6V 3.6 V VCCHYS VCC Threshold Detection Hysteresis Voltage VCCIO Threshold Detection Voltage VCCIO = 1.8V 2.7V VREG 3.6V Supply Lost Supply Present 1.4 mV VCCIOTH 0.5 V VCCIOHYS VREGTH VCCIO Threshold Detection Hysteresis Voltage Regulated Supply Threshold Detection Voltage VREG = 3.3V 1.65V VCCIO VREG 2.7V VREG 3.6V Supply Lost Supply Present 2.4(14) 450 mV 0.8 V VREGHYS (15) Regulated Supply Threshold Detection Hysteresis Voltage VCCIO = 1.8V 450 mV Notes: 9. 10. 11. 12. 13. 14. 15. ILOAD includes the pull-up resistor current via terminal VPU The minimum voltage in Suspend mode is 2.7V. Not tested in production, value based on characterization. Excludes any current from load and VPU current to the 1.5k resistor. Includes current between Vpu and the 1.5k internal pull-up resistor. When VCCIO < 2.7V, minimum value for VREGTH = 2.0V for supply present condition. DC electrical measurements should be taken with unused inputs and I/O pins connected to a valid logic level. This applies for all modes of device operation defined in the Functional Tables on Page 4. (c) 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com USB1T1103 Rev. 1.0.2 8 USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator DC Electrical Characteristics Digital Terminals - excludes D+, D- Terminals Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). VCCIO = 1.65V to 3.6V. Limits Symbol Input Levels VIL VIH Output Levels VOL VOH Leakage Current ILI Capacitance CIN, CI/O Input Capacitance Terminal to GND 10.0 pF Input Leakage Current VCCIO = 1.65V to 3.6V 1.0(16) A LOW Level Output Voltage HIGH Level Output Voltage IOL = 2 mA IOL = 100 =A IOH = 2 mA IOH = 100 =A VCCIO - 0.4 VCCIO- 0.15 0.4 0.15 V V LOW Level Input Voltage HIGH Level Input Voltage 0.6*VCCIO 0.3*VCCIO V V Parameter Conditions -40C to +85C Min. Max. Units Notes: 16. If VCCIO VREG, leakage current is higher than specified. DC Electrical Characteristics Analog I/O Terminals - D+, D- Terminals Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). VCC = 4.0V to 5.5V or VREG = 3.0V to 3.6V. Limits Symbol Parameter Conditions -40C to +85C Min. Input Levels - Differential Receiver VDI VCM VIL VIH VHYS Output Levels VOL VOH Leakage Current IOFF CI/O Resistance Input Leakage Current Off State CAPACITANCE I/O Capacitance Terminal to GND 20.0 pF 1.0 A LOW Level Output Voltage HIGH Level Output Voltage(17) RL = 1.5k to 3.6V RL = 15k to GND 2.8 0.3 3.6 V V Differential Input Sensitivity Differential Common Mode Voltage LOW Level Input Voltage HIGH Level Input Voltage Hysteresis Voltage 2.0 0.30 0.7 | VI(D+) - VI(D-) | 0.2 0.8 2.5 0.8 V V V V V Units Typ. Max. Input Levels - Single-ended Receiver (c) 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com USB1T1103 Rev. 1.0.2 9 USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator Limits Symbol Parameter Driver Output Impedance(18) Driver Input Impedance Switch Resistance Termination Voltage (19)(20) Conditions -40C to +85C Min. Typ. 41.0 Units M Max. 44.0 ZDRV ZIN RSW VTERM 34.0 10.0 10.0 RPU Upstream Port 3.0 3.6 V Notes: 17. 18. 19. 20. If VOH minimum = VREG - 0.2V. Includes external resistors of 27 on both D+ and D- terminals. This voltage is available at terminal VPU and VREG. Minimum voltage is 2.7V in the suspend mode. AC Electrical Characteristics A I/O Terminals Full Speed Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). VCC = 4.0V to 5.5V or VREG = 3.0V to 3.6V, VCCIO = 1.65V to 3.6V, CL = 50 pF; RL = 1.5K on D+ to VPU. Symbol Driver Characteristics tR tF tRFM VCRS Driver Timing tPLH tPHL tPHZ tPLZ tPZH tPZL Receiver Timing tPLH tPHL tPLH tPHL Parameter Conditions Limits -40C to +85C Min. Typ. Max. 4.0 4.0 90.0 1.3 20.0 Unit Output Rise Time Output Fall Time Rise/Fall Time Match Output Signal Crossover Voltage (21) CL = 50 - 125 pF 10% to 90% Figure 8, 12 tF/ tR Excludes First Transition from Idle State Excludes First Transition from Idle State see Waveform ns 20.0 111.1 2.0 % V Propagation Delay (Vp/Vpo, Vm/Vmo to D+/D-) Driver Disable Delay (OE to D+/D-) Driver Enable Delay (OE to D+/D-) Propagation Delay (Diff) (D+/D- to Rev) Single-Ended Receiver Propagation Delay (D+/D- to Vp/ Vpo, Vm/Vmo) Figures 9,12 Figures 11,12 Figures 11,13 18.0 15.0 15.0 ns ns ns Figures 10,14 Figures 10,14 15.0 18.0 ns ns NOTES: 21. Not production tested; limits guaranteed by design. (c) 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com USB1T1103 Rev. 1.0.2 10 USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator Typical Application Configurations Figure 6. Upstream Connection in Bypass Mode with Differential Outputs Figure 7. Downstream Connection in Normal Mode with Differential Outputs (c) 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com USB1T1103 Rev. 1.0.2 11 USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator AC Waveforms Figure 8. Rise and Fall Times Figure 10. D+/D- to RCV, Vpo/Vp and Vmo/Vm Figure 9. Vpo, Vmo to D+/D- Figure 11. OE to D+/D- Test Circuits and Waveforms CL = 50 pF Full Speed Propagation Delays CL = -125 pF Edge Rates only Figure 14. Load for Vm/Vmo, Vp/Vpo and RCV Figure 12. Load for D+/D- V = 0 for tPZH, tPHZ V = VREG for tPZL Figure 13. Load for Enable and Disable Times (c) 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com USB1T1103 Rev. 1.0.2 12 USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator Tape and Reel Specification Tape Format for MHBCC and MLP Package Designator MHX/MPX Tape Section Leader (Start End) Carrier Trailer (Hub End) Number Cavities 125 (typ) 2500/3000 75 (typ) Cavity Status Empty Filled Empty Cover Tape Status Sealed Sealed Sealed TAPE DIMENSIONS Dimensions are in inches (millimeters) unless otherwise specified. REEL DIMENSIONS Dimensions are in inches (millimeters) unless otherwise specified. Tape Size 12 mm A 13.0 330 B 0.059 (1.50) C 0.512 (13.00) D 0.795 (20.20) N 7.008 (178) W1 0.488 (12.4) W2 0.724 (18.4) (c) 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com USB1T1103 Rev. 1.0.2 13 USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator Physical Dimensions Dimensions are in inches (millimeters) unless otherwise noted. Figure 15. Pb-Free 14-Terminal Molded Leadless Package (MLP), 2.5mm Square (c) 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com USB1T1103 Rev. 1.0.2 14 USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator Physical Dimensions Dimensions are in inches (millimeters) unless otherwise noted. Figure 16. Pb-Free 16-Terminal Molded Leadless Package (MHBCC), JEDEC MO-217, 3mm Square (c) 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com USB1T1103 Rev. 1.0.2 15 USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator (c) 2005 Fairchild Semiconductor Corporation USBIT1103 Rev.1.0.2 16 www.fairchildsemi.com |
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